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Algorithmic and Register-Transfer Level Synthesis: The System Architect’s Workbench
by Donald E. Thomas
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The Verilog Hardware Description Language
by Donald E. Thomas
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The Verilog (R) Hardware Description Language
by Donald E. Thomas
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The Verilog Hardware Description Language
by Donald E. Thomas
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The Verilog Tm Hardware Description Language
by Donald E. Thomas
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Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench
by Donald E. Thomas
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