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FET Modeling for Circuit Simulation Dileep A. Divekar

FET Modeling for Circuit Simulation By Dileep A. Divekar

FET Modeling for Circuit Simulation by Dileep A. Divekar


Summary

Circuit simulation is widely used for the design of circuits, both discrete and integrated. Understanding device modeling with particular emphasis on circuit simulation will be helpful in utilizing the built-in models more efficiently as well as in implementing new models.

FET Modeling for Circuit Simulation Summary

FET Modeling for Circuit Simulation by Dileep A. Divekar

Circuit simulation is widely used for the design of circuits, both discrete and integrated. Device modeling is an impor­ tant aspect of circuit simulation since it is the link between the physical device and the sim ulate d device. Curren tly available circuit simulation programs provide a variety of built-in models. Many circuit designers use these built-in models whereas some incorporate new models in the circuit sim ulation programs. Understanding device modeling with particular emphasis on circuit simulation will be helpful in utilizing the built-in models more efficiently as well as in implementing new models. SPICE is used as a vehicle since it is the most widely used circuit sim ulation program. How­ ever, some issues are addressed which are not directly appli­ cable to SPICE but are applicable to circuit simulation in general. These discussions are useful for modifying SPICE and for understanding other simulation programs. The gen­ eric version 2G. 6 is used as a reference for SPICE, although numerous different versions exist with different modifications. This book describes field effect transistor models commonly used in a variety of circuit sim ulation pro­ grams. Understanding of the basic device physics and some familiarity with device modeling is assumed. Derivation of the model equations is not included. ( SPICE is a circuit sim ulation program available from EECS Industrial Support Office, 461 Cory Hall, University of Cali­ fornia, Berkeley, CA 94720. ) Acknowledgements I wish to express my gratitude to Valid Logic Systems, Inc.

Table of Contents

1 — Circuit Simulation.- 1.1 Introduction.- 1.2 Circuit Simulation Programs.- 1.3 Circuit Analysis.- 1.3.1 DC Analysis.- 1.3.2 Transient Analysis.- 1.3.3 Charge Nonconservation Problem.- 1.3.4 AC Analysis.- 2 — Device Modeling.- 2.1 Model Development.- 2.2 Model Specification.- 2.3 Model Computation.- 2.4 Model Parameter Extraction.- 3 — Diode Models.- 3.1 Introduction.- 3.2 DC Characteristics.- 3.2.1 MOSFET diodes.- 3.2.2 JFET and MESFET diodes.- 3.2.3 Parasitic diode model.- 3.2.4 Schottky barrier diodes.- 3.3 Junction voltage limiting.- 3.4 Charge storage.- 3.5 Temperature dependence.- 3.6 Model parameter extraction.- 4 — Jfet Models.- 4.1 Introduction.- 4.2 DC Characteristics.- 4.3 Device symmetry.- 4.4 Voltage limiting.- 4.4.1 Gate-source voltage.- 4.4.2 Gate-drain voltage.- 4.5 Charge storage.- 4.6 Temperature dependence.- 4.7 Model parameter extraction.- 5 — Mosfet Models.- 5.1 Introduction.- 5.2 Basic dc characteristics.- 5.3 Device dimensions.- 5.4 MOSFET parasitics.- 5.5 Common model parameters.- 5.6 Basic device model (level 1).- 5.7 Second order effects.- 5.8 Bulk doping term.- 5.9 Threshold voltage shift.- 5.10 Mobility reduction.- 5.11 Velocity saturation.- 5.12 Channel length modulation.- 5.13 Subthreshold conduction.- 5.14 Avalanche current.- 5.15 Oxide charging.- 5.16 Device symmetry.- 5.17 Voltage limiting.- 5.17.1 Gate-source voltage.- 5.17.2 Drain-source voltage.- 5.18 Geometry dependence.- 5.19 Level 2 model.- 5.19.1 Threshold voltage.- 5.19.2 Mobility reduction.- 5.19.3 Velocity saturation.- 5.19.4 Channel length modulation.- 5.19.5 Drain current.- 5.19.6 Subthreshold conduction.- 5.20 Level 3 model.- 5.20.1 Threshold voltage.- 5.20.2 Mobility reduction.- 5.20.3 Velocity saturation.- 5.20.4 Drain current.- 5.20.5 Channel length modulation.- 5.20.6 Subthreshold conduction.- 5.21 CSIM model.- 5.22 BSIM model.- 5.22.1 Threshold voltage.- 5.22.2 Mobility reduction.- 5.22.3 Effective beta.- 5.22.4 Saturation Voltage.- 5.22.5 Drain Current.- 5.22.6 Subthreshold Conduction.- 5.22.7 Geomtery dependence.- 5.23 Table lookup models.- 5.24 Depletion devices.- 5.25 Model parameter extraction.- 5.26 Charge storage.- 5.27 Meyer capacitance model.- 5.28 Smoothed Meyer model.- 5.29 Charge non conservation problem.- 5.30 Charge based models.- 5.31 Ward-Dutton charge model.- 5.32 Yang-Chatter je e charge model.- 5.33 BSIM charge model.- 5.34 Second order effects on charges.- 5.35 Temperature dependence.- 5.36 Modeling for Analog Applications.- 5.37 Power MOSFETs.- 6 — Mesfet Models.- 6.1 Introduction.- 6.2 Device symmetry.- 6.3 DC characteristics.- 6.4 Subthreshold conduction.- 6.5 Charge storage.- 6.6 Charge based model.- 6.7 Temperature dependence.- 6.8 Modeling for analog applications.- 6.9 Model parameter extraction.- References.

Additional information

NPB9780898382648
9780898382648
0898382645
FET Modeling for Circuit Simulation by Dileep A. Divekar
New
Hardback
Kluwer Academic Publishers
1988-03-31
184
N/A
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