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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Andrei Pavlov

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies By Andrei Pavlov

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies by Andrei Pavlov


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Summary

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing.

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Summary

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test by Andrei Pavlov

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

About Andrei Pavlov

Prof. Sachdev has authored several successful books with Springer

Table of Contents

and Motivation.- SRAM Circuit Design and Operation.- SRAM Cell Stability: Definition, Modeling and Testing.- Traditional SRAM Fault Models and Test Practices.- Techniques for Detection of SRAM Cells with Stability Faults.- Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques.

Additional information

NPB9781402083624
9781402083624
1402083629
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test by Andrei Pavlov
New
Hardback
Springer-Verlag New York Inc.
2008-06-21
194
N/A
Book picture is for illustrative purposes only, actual binding, cover or edition may vary.
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