My Account
Log in Registration
All
Cart
Highlights
Fiction Books
Non-Fiction Books
Children's Books
Rare Books
Music
DVD & Blu-Ray
Video Games
Category
Wishlists
Cart
All
Free US shipping over $10
Trustpilot
Proud to be B-Corp

Asynchronous Circuits Janusz A. Brzozowski

Asynchronous Circuits By Janusz A. Brzozowski

Asynchronous Circuits by Janusz A. Brzozowski

Reviews:
$188.59
Condition - New
Only 2 left
New

Summary

In recent years, there has been a great surge of interest in asynchronous circuits, largely through the development of new asynchronous design methodologies. This book provides a comprehensive theory of asynchronous circuits, including modelling, analysis, simulation, specification, verification, and an introduction to their design.

Asynchronous Circuits Summary

Asynchronous Circuits by Janusz A. Brzozowski

In recent years, there has been a great surge of interest in asynchronous circuits, largely through the development of new asynchronous design methodologies. This book provides a comprehensive theory of asynchronous circuits, including modelling, analysis, simulation, specification, verification, and an introduction to their design.

Table of Contents

1 Introductory Examples.- 1.1 Logic Gates.- 1.2 Performance Estimation.- 1.3 RS Flip-Flop.- 1.4 Dynamic CMOS Logic.- 1.5 Divide-by-2 Counter.- 1.6 Summary.- 2 Mathematical Background.- 2.1 Sets and Relations.- 2.2 Boolean Algebra.- 2.3 Ternary Algebra.- 2.4 Directed Graphs.- 3 Delay Models.- 3.1 Environment Modes.- 3.2 Gates with Delays.- 3.3 Ideal Delays.- 3.4 Inertial Delays.- 4 Gate Circuits.- 4.1 Properties of Gates.- 4.2 Classes of Gate Circuits.- 4.3 The Circuit Graph.- 4.4 Network Models.- 4.5 Models of More Complex Gates.- 5 CMOS Transistor Circuits.- 5.1 CMOS Cells.- 5.2 Combinational CMOS Circuits.- 5.3 General CMOS Circuits.- 5.4 Node Excitation Functions.- 5.5 Path Strength Models.- 5.6 Capacitance Effects.- 5.7 Network Model of CMOS Circuits.- 6 Up-Bounded-Delay Race Models.- 6.1 The General Multiple-Winner Model.- 6.2 GMW Analysis and UIN Delays.- 6.3 The Outcome in GMW Analysis.- 6.4 Stable States and Feedback-State Networks.- 6.5 GMW Analysis and Network Models.- 6.6 The Extended GMW Model.- 6.7 Single-Winner Race Models.- 6.8 Up-Bounded Ideal Delays.- 6.9 Proofs.- 6.9.1 Proofs for Section 6.2.- 6.9.2 Proofs for Section 6.3.- 7 Ternary Simulation.- 7.1 Introductory Examples.- 7.2 Algorithm A.- 7.3 Algorithm B.- 7.4 Feedback-Delay Models.- 7.5 Hazards.- 7.5.1 Static Hazards.- 7.5.2 Dynamic Hazards.- 7.6 Ternary Simulation and the GSW Model.- 7.7 Ternary Simulation and the XMW Model.- 7.8 Proofs of Main Results.- 8 Bi-Bounded Delay Models.- 8.1 Discrete Binary Models.- 8.2 Continuous Binary Model.- 8.3 Algorithms for Continuous Binary Analysis.- 8.4 Continuous Ternary Model.- 8.5 Discrete Ternary Model.- 9 Complexity of Race Analysis.- 9.1 Stable-State Reachability.- 9.2 Limited Reachability.- 10 Regular Languages and Finite Automata.- 10.1 Regular Languages.- 10.1.1 Semigroups.- 10.1.2 Languages.- 10.1.3 Regular Languages.- 10.1.4 Quotients of Languages.- 10.2 Regular Expressions.- 10.2.1 Extended Regular Expressions.- 10.2.2 Quotients of Regular Expressions.- 10.3 Quotient Equations.- 10.4 Finite Automata.- 10.4.1 Basic Concepts.- 10.4.2 Recognizable Languages.- 10.5 Equivalence and Reduction of Automata.- 10.6 Nondeterministic Automata.- 10.7 Expression Automata.- 11 Behaviors and Realizations.- 11.1 Motivation.- 11.2 Behaviors.- 11.3 Projections of Implementations to Specifications.- 11.4 Relevant Words.- 11.4.1 Same Input and Output Alphabets.- 11.4.2 Different Input and Output Alphabets.- 11.5 Proper Behaviors.- 11.6 Realization.- 11.6.1 Safety and Capability.- 11.6.2 Deadlock.- 11.6.3 Livelock.- 11.6.4 Definition of Realization.- 11.7 Behavior Schemas.- 11.8 Concluding Remarks.- 12 Types of Behaviors.- 12.1 Introductory Examples.- 12.2 Fundamental-Mode Specifications.- 12.3 Fundamental-Mode Network Behaviors.- 12.4 Direct Behaviors.- 12.5 Serial Behaviors.- 13 Limitations of Up-Bounded Delay Models.- 13.1 Delay-Insensitivity in Fundamental Mode.- 13.2 Composite Functions.- 13.3 Main Theorem for Fundamental Mode.- 13.4 Delay-Insensitivity in Input/Output Mode.- 13.4.1 The Main Lemma.- 13.4.2 Some Behaviors Without DI Realizations.- 13.4.3 Nontrivial Sequential Behaviors.- 13.5 Concluding Remarks.- 14 Symbolic Analysis.- 14.1 Representing Boolean Functions.- 14.2 Symbolic Representations.- 14.2.1 Finite Domains.- 14.2.2 Sets.- 14.2.3 Relations.- 14.2.4 Behaviors.- 14.3 Deriving Symbolic Behaviors.- 14.4 Symbolic Race Analysis.- 14.4.1 Symbolic Ternary Simulation.- 14.4.2 Symbolic Bounded-Delay Analysis.- 14.5 Symbolic Verification of Realization.- 14.6 Symbolic Model Checking.- 15 Design of Asynchronous Circuits.- 15.1 Introduction.- 15.2 Fundamental-Mode Huffman Circuits.- 15.3 Hollaar Circuits.- 15.4 Burst-Mode Circuits.- 15.5 Module Synthesis Using I-Nets.- 15.6 Signal Transition Graphs.- 15.7 Change Diagrams.- 15.8 Protocols in DI Circuits.- 15.9 Ebergen's Trace Theory Method.- 15.10 Compilation of Communicating Processes.- 15.11 Handshake Circuits.- 15.12 Module-Based Compilation Systems.- 15.13 DCVSL and Interconnection Modules.- 15.14 Micropipelines.- 15.15 Concluding Remarks.- List of Figures.- List of Tables.- List of Mathematical Concepts.

Additional information

NLS9781461286981
9781461286981
1461286980
Asynchronous Circuits by Janusz A. Brzozowski
Janusz A. Brzozowski
Monographs in Computer Science
New
Paperback
Springer-Verlag New York Inc.
2011-11-11
404
N/A
Book picture is for illustrative purposes only, actual binding, cover or edition may vary.
This is a new book - be the first to read this copy. With untouched pages and a perfect binding, your brand new copy is ready to be opened for the first time

Customer Reviews - Asynchronous Circuits