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Robust SRAM Designs and Analysis Jawar Singh

Robust SRAM Designs and Analysis By Jawar Singh

Robust SRAM Designs and Analysis by Jawar Singh


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Summary

This book provides a guide to Static Random Access Memory (SRAM) bitcell design and analysis to meet the nano-regime challenges for CMOS devices and emerging devices, such as Tunnel FETs.

Robust SRAM Designs and Analysis Summary

Robust SRAM Designs and Analysis by Jawar Singh

This book provides a guide to Static Random Access Memory (SRAM) bitcell design and analysis to meet the nano-regime challenges for CMOS devices and emerging devices, such as Tunnel FETs. Since process variability is an ongoing challenge in large memory arrays, this book highlights the most popular SRAM bitcell topologies (benchmark circuits) that mitigate variability, along with exhaustive analysis. Experimental simulation setups are also included, which cover nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis. Emphasis is placed throughout the book on the various trade-offs for achieving a best SRAM bitcell design.

  • Provides a complete and concise introduction to SRAM bitcell design and analysis;
  • Offers techniques to face nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis;
  • Includes simulation set-ups for extracting different design metrics for CMOS technology and emerging devices;
  • Emphasizes different trade-offs for achieving the best possible SRAM bitcell design.

Table of Contents

Introduction to SRAM.- Design Metrics of SRAM Bitcell.- Single-ended SRAM Bitcell Design.- 2-Port SRAM Bitcell Design.- SRAM Bitcell Design Using Unidirectional Devices.- NBTI and its Effect on SRAM.

Additional information

NPB9781461408178
9781461408178
1461408172
Robust SRAM Designs and Analysis by Jawar Singh
New
Hardback
Springer-Verlag New York Inc.
2012-07-31
168
N/A
Book picture is for illustrative purposes only, actual binding, cover or edition may vary.
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