(NOTE:
Each chapter concludes with a Chapter Summary, Important Terms, Problems, and Answers to Section Review Questions.)
1. Introductory Concepts. Numerical Representations. Digital and Analog Systems. Digital Number Systems. Representing Binary Quantities. Digital Circuits/Logic Circuits. Parallel and Series Transmission. Memory. Digital Computers.
2. Number Systems and Codes. Binary-to-Decimal Conversions. Decimal-to-Binary Conversions. Octal Number System. Hexadecimal Number System. BCD Code. Putting It All Together. The Byte, Nibble, and Word. Alphanumeric Codes. Parity Method for Error Detection. Applications.
3. Describing Logic Circuits. Boolean Constants and Variables. Truth Tables. OR Operation with OR Gates. AND Operation with AND Gates. NOT Operation. Describing Logic Circuits Algebraically. Evaluating Logic-Circuit Outputs. Implementing Circuits from Boolean Expressions. NOR Gates and NAND Gates. Boolean Theorems. DeMorgan's Theorems. Universality of NAND Gates and NOR Gates. Alternate Logic-Gate Representations. Which Gate Representation to Use. IEEE/ANSI Standard Logic Symbols. Summary of Methods to Describe Logic Circuits. Description Languages Versus Programming Languages. Implementing Logic Circuits with PLDs. HDL Format and Syntax. Intermediate Signals.
4. Combinational Logic Circuits. Sum-of-Products Form. Simplifying Logic Circuits. Algebraic Simplification. Designing Combinational Logic Circuits. Karnaugh Map Method. Exclusive-OR and Exclusive-NOR Circuits. Parity Generator and Checker. Enable/Disable Circuits. Basic Characteristics of Digital ICs. Troubleshooting Digital Systems. Internal Digital IC Faults. External Faults. Troubleshooting Case Study. Programmable Logic Devices. Representing Data in HDL. Truth Tables Using HDL. Decision Control Structures in HDL.
5. Flip-Flops and Related Devices. NAND Gate Latch. NOR Gate Latch. Troubleshooting Case Study. Clock Signals and Clocked Flip-Flops. Clocked S-C Flip-Flop. Clocked J-K Flip-Flop. Clocked D Flip-Flop. D Latch (Transparent Latch). Asynchronous Inputs. IEEE/ANSI Symbols. Flip-Flop Timing Considerations. Potential Timing Problem in FF Circuits. Master/Slave Flip-Flops. Flip-Flop Applications. Flip-Flop Synchronization. Detecting an Input Sequence. Data Storage and Transfer. Serial Data Transfer: Shift Registers. Frequency Division and Counting. Microcomputer Application. Schmitt-Trigger Devices. One-Shot (Monostable Multivibrator). Analyzing Sequential Circuits. Clock Generator Circuits. Troubleshooting Flip-Flop Circuits. Sequential Circuits Using HDL. Edge-Triggered Devices. HDL Circuits with Multiple Components.
6. Digital Arithmetic: Operations and Circuits. Binary Addition. Representing Signed Numbers. Addition in the 2's-Complement System. Subtraction in the 2's-Complement System. Multiplication of Binary Numbers. Binary Division. BCD Addition. Hexadecimal Arithmetic. Arithmetic Circuits. Parallel Binary Adder. Design of a Full Adder. Complete Parallel Adder with Registers. Carry Propagation. Integrated-Circuit Parallel Adder. 2's-Complement System. BCD Adder. ALU Integrated Circuits. IEEE/ANSI Symbols. Troubleshooting Case Study. Using TTL Library Functions with HDL. Logical Operations on Bit Arrays. HDL Adders. Expanding the Bit Capacity of a Circuit.
7. Counters and Registers. Part I. Asynchronous (Ripple) Counters. Counters with MOD Numbers <2 N. IC Asynchronous Counters. Asynchronous Down Counter. Propagation Delay in Ripple Counters. Synchronous (Parallel) Counters. Synchronous Down and Up/Down Counters. Presettable Counters. The 74LS193/HC193. More on the IEEE/ANSI Dependency Notation. Decoding a Counter. Decoding Glitches. Cascading BCD Counters. Synchronous Counter Design. Basic Counters Using HDL. Full-Featured Counters in HDL. LPM Counters. State Machines.
Part II. Integrated-Circuit Registers. Parallel In/Parallel Out-The 74ALS174/74HC174. Serial In/Serial Out-The 4731B. Parallel In/Serial Out-The 74ALS165/74HC165. Serial In/Parallel Out-The 74ALS164/74HC164. IEEE/ANSI Register Symbols. Shift Register Counters. Troubleshooting. HDL Registers. HDL Ring Counters. HDL One-Shots.
8. Integrated-Circuit Logic Families. Digital IC Terminology. The TTL Logic Family. TTL Data Sheets. TTL Series Characteristics. TTL Loading and Fan-Out. Other TTL Characteristics. MOS Technology. Digital MOSFET Circuits. Complementary MOS Logic. CMOS Series Characteristics. Low-Voltage Technology. Open- Collector/Open-Drain Outputs. Tristate (Three-State) Logic Outputs. High-Speed Bus Interface Logic. The ECL Digital IC Family. CMOS Transmission Gate (Bilateral Switch). IC Interfacing. TTL Driving CMOS. CMOS Driving TTL. Analog Voltage Comparators. Troubleshooting.
9. MSI Logic Circuits. Decoders. BCD-to-7-Segment Decoder/Drivers. Liquid-Crystal Displays. Encoders. Troubleshooting. Multiplexers (Data Selectors). Multiplexer Applications. Demultiplexers (Data Distributors). More Troubleshooting. Magnitude Comparator. Code Converters. Data Busing. The 74ALS173/HC173 Tristate Register. Data Bus Operation. Decoders Using HDL. The HDL 7-Segment Decoder/Driver. Encoders Using HDL. HDL Multiplexers and Demultiplexers. HDL Magnitude Comparators. HDL Code Converters.
10. Digital System Projects Using HDL. Small Project Management. Stepper Motor Driver Project. Keypad Encoder Project. Digital Clock Project. Frequency Counter Project.
11. Interfacing with the Analog World. Review of Digital Versus Analog. Digital-to-Analog Conversion. D/A-Converter Circuitry. DAC Specifications. An Integrated-Circuit DAC. DAC Applications. Troubleshooting DACs. Analog-to-Digital Conversion. Digital-Ramp ADC. Data Acquisition. Successive-Approximation ADC. Flash ADCs. Other A/D Conversion Methods. Digital Voltmeter. Sample-and-Hold Circuits. Multiplexing. Digital Storage Oscilloscope. Digital Signal Processing (DSP).
12. Memory Devices. Memory Terminology. General Memory Operation. CPU-Memory Connections. Read-Only Memories. ROM Architecture. ROM Timing. Types of ROMs. Flash Memory. ROM Applications. Semiconductor RAM. RAM Architecture. Static RAM (SRAM). Dynamic RAM (DRAM). Dynamic RAM Structure and Operation. DRAM Read/Write Cycles. DRAM Refreshing. DRAM Technology. Expanding Word Size and Capacity. Special Memory Functions. Troubleshooting RAM Systems. Testing ROM.
13. Programmable Logic Device Architectures. Digital Systems Family Tree. Fundamentals of PLD Circuitry. PLD Architectures. The GAL 16V8A (Generic Array Logic). The Altera EPM7128S CPLD. The Altera FLEX10K Family.
Glossary. Answers to Selected Problems. Index of ICs. Index. 